Managing Scratchpad Memory Architecture for Lower Power Consumption Using Programming Techniques

Kavita Tabbassum; Shahnawaz Talpur; Noor-u-Zaman Laghari

doi:10.18034/ajase.v9i1.31

Authors

Kavita Tabbassum Information Technology Centre, Sindh Agricultural University, Tando Jam, Hyderabad, Sindh, PAKISTAN
Shahnawaz Talpur Department of Computer Systems Engineering, Mehran University of Engineering & Technology, Indus Hwy, Jamshoro, Sindh, PAKISTAN
Noor-u-Zaman Laghari Department of Computer Systems Engineering, Mehran University of Engineering & Technology, Indus Hwy, Jamshoro, Sindh, PAKISTAN

Keywords:

Scratch

Scratchpad

Memory Architectures

Abstract

In embedded systems Scratch memory is generally used as an addition to caches or as a substitute of cache, but due to their comprehensive ease of programmability cache containing architectures are still to be chosen in numerous applications. Power consumption of ported applications can be significantly lowered as well as the portability of scratchpad architectures will be advanced with our suggested language-agnostic software management method. To enhance the memory configuration on relevant architectures, a variety of present methods is reviewed for finding the chances of optimizations and usage of new methods as well as their applicability to numerous memory schemes are discussed in this paper.

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